| 摘要 |
<p>1,147,548. Data transmission systems. INTERNATIONAL BUSINESS MACHINES CORP 27 Dec., 1967 [30 Jan., 1967], No. 58600/67. Heading H4P. Digital data is transmitted in one or other of two modes, e.g. 8-bit code or 4-bit code, transmission in each mode being preceded by a control signal. The control signals consist of two parts, the first of which readies the receiver for control by the second. If the first part of a control signal is simulated by data at the transmitter input that part is repeated so that the receiver is switched from the state of readiness by the repeat. Transmitter.-Parallel-bit input data passes via gate 19 to buffer 16 which via gate 22 feeds register 14 connected to transmission channel 12. When transmission is to be changed from 8-bit code to 2 x 4-bit code (in which each 4-bit group represents a decimal number) a control signal consisting of two 8-bit parts DLE, STX is transmitted. Decoder 20 recognizes the 8-bit DLE and via gate 31 sets bi-stable 30 to 1. The following 8-bit character STX is then transmitted and decoder 20 sets bi-stable 38 to 1 via gate 36. This bi-stable indicates the mode of transmission (or reception). Bi-stable 30 is reset via inverter 46 and gates 47, 48. Subsequently 2 x 4-bit code is transmitted. If two 4-bit words identical to the 8-bit word DLE fortuitously occur, bi-stable 30 is again set to 1 and a pulse passes via gate 36 and inverter 28 to inhibit gate 22 so preventing read out of the word DLE from buffer 16. The pulse also passes via gate 34 to set bi-stable 23 to 1 and via gate 52 and inserts DLE in register 14 for transmission. When a DLE is transmitted a signal appears on line 25 which passes via gate 60 to register 14 which now transmits a second DLE. To revert to the original mode a pulse on line 40 from the input unit resets bi-stable 38 and a control signal DLE, ETX is passed to buffer 16 for transmission. The DLE does not cause repetition because bi-stable 38 is reset. Receiver.-Serial-bit data on line 10 passes via register 14 and gate 17 to buffer 16 which passes it to the output unit via gate 18. On reception of the control signal DLE, STX bi-stable 38 is set to 1 as indicated above. If subsequently a DLE is, received, decoder 20 sets bi-stable 30 via gate 31 and sets bi-stable 23 via gates 36, 56. Consequently gate 18 is inhibited and the DLE is not passed to the output unit. If the following word is ETX, indicating a change in mode, decoder 20 resets bi-stable 38 via gates 33, 44. If however the following word was another DLE a pulse on line 67 passes via gates 66, 48 to reset bi-stable 30, so enabling gate 18 which passes this DLE to the output unit.</p> |
