| 摘要 |
PURPOSE:To switch a reference clock signal and a digital pattern signal continuously by providing a basic clock generating circuit with the 1st and the 2nd clock data registers, and storing clock data in one register and outputting a basic clock signal from the other. CONSTITUTION:The basic clock generating circuit 30 is provided with the 1st address registers 31 and 32 and the 2nd address registers 34 and 35 to be stored with clock data, which are stored in them alternately according to an address alternation signal from a pattern generating circuit 20. Further, the basic clock signal is outputted according to the clock data stored in the clock data registers 31 and 32 and clock data for a next basic clock are stored in other clock data registers 34 and 35. Consequently, while the digital pattern signal is generated continuously, the clock rate of the basic clock signal is variable. |
