发明名称
摘要 PURPOSE:To attain high speed operation of a dynamic circuit by impressing an output of a delay circuit to the 2nd and 3rd field effect transistors (TR) provided to a reference potential and one terminal and a gate of the 1st field effect TR. CONSTITUTION:An insulation gate type field effect TRQ3 keeps unsaturated region and the level of an output and a node 2 rise almost in synchronizing with a clock input phi. The level of the output of the delay circuit, that is, that of a node 3 rises with a prescribed delay from that of the node 2. When a potential of the node 3 rises, insulation type field effect TRs Q2, Q4 are conductive and a clock input phi' is at a low level and the insulation type field effect TRQ1 is in the nonconductive state, then the level increased rapidly of the potential of the node 1 dops to a common potential at first. The insulation type field effect TRQ3 is nonconductive and the level decreases to the common potential level by the conduction of an insulation type field effect TRQ4. The potential of the node 2 rises rapidly.
申请公布号 JPS6124849(B2) 申请公布日期 1986.06.12
申请号 JP19840260429 申请日期 1984.12.10
申请人 NIPPON ELECTRIC CO 发明人 OSAMI AKIRA
分类号 H03K5/04;H03K19/017;H03K19/096 主分类号 H03K5/04
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