发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To prevent erroneous operation due to a late effect, by forming a silicon single crystal island, in which a PNPN thyristor is formed and which has high impurity concentration with respect to another silicon single crystal island, and forming a junction constituting the PNPN thyristor deeper than the junction of the other element. CONSTITUTION:A first silicon single crystal island 11 is formed so that impurity concentration becomes 3X10<14>atom/cm<3>. A second silicon single crystal island 12 is formed so that impurity concentration becomes 4.5X10<14>atom/cm<3>. Thus a dielectric isolating silicon substrate is formed. A transistor having a junction 13 with a depth of 5mum is formed in the silicon single crystal island 11. An PNPN thyristor is formed by using a deep junction 14 having a depth of 30mum in the silicon single crystal island 12. With respect to the PNPN thyristor formed by the deep junction 14, the transistor constituting a late-effect-error preventing circuit is formed by the shallow junction 13. Therefore, a transition time to a conducting state is short, and the erroneous operation due to the late effect can be prevented.
申请公布号 JPS61125080(A) 申请公布日期 1986.06.12
申请号 JP19840246602 申请日期 1984.11.21
申请人 NEC CORP 发明人 TAKEUCHI TOKUO
分类号 H01L21/762;H01L27/06;H01L29/74 主分类号 H01L21/762
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