发明名称 MIS TYPE SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURE THEREOF
摘要 PURPOSE:To shallow the depth of source-drain diffusion layers, and to lower the layer resistance of a gate electrode material by forming a polycrystalline silicon layer having low resistance onto source-drain regions and shaping a gate oxide film in recessed structure. CONSTITUTION:A diffusion layer region surrounded by a field oxide film region 32 is formed onto a substrate 31, and a polycrystalline silicon layer 33 is grown. Mask aluminum 34 is shaped, and an impurity is doped into polycrystalline silicon. A gate region B having recessed structure is formed through etching by using a photo-resist 35. A diffusion region 36 is shaped through heat treatment, and a gate oxide layer 37 is formed. A gate electrode 38 and an inter- layer insulating film 349 are shaped, and contact holes are bored and wirings are patterned 40. Accordingly, the depth of the diffusion layer region 36 can be shallowed, thus providing the change of characteristics such as a punch- through phenomenon.
申请公布号 JPS61125175(A) 申请公布日期 1986.06.12
申请号 JP19840247101 申请日期 1984.11.22
申请人 NEC CORP 发明人 KOMATSU MICHIO
分类号 H01L21/8234;H01L27/088;H01L29/08;H01L29/78 主分类号 H01L21/8234
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