| 摘要 |
PURPOSE:To make an external circuit unnecessary for generating an initializing signal and to eliminate the possibility of malfunction due to an external noise by clearing a flip flop (FF) with the aid of a signal in a pulse adding and subtracting circuit so as to initialize the FF. CONSTITUTION:When the 1st clock of a clock A 3 is inputted, a J-KFF 12 is triggered and its Q output signal C' goes to 'H'. When the 2nd clock is inputted, the Q output signal D' of a J-KFF 13 goes to 'L'. When the signal D' goes to 'L', J-KFFs 10 and 11 are cleared together, and their Q output signals B' and K' go to 'L', while signals E', F' and H' go to 'H', thereby initializing the J-KFFs 10 and 11. Afterwards, when an addition and subtraction instructing pulse is inputted, adding and subtracting actions are done. Due to the fall of the signal D' after said addition and subtraction, the J-KFFs 10 and 11 are cleared. At the time of turning on an electric power source, the signal D' becoming active with respect to CLP terminals of the J-KFFs 10 and 11 is extracted, the J-KFFs 10 and 11 are cleared and initialized, thereby making the external circuit unnecessary. |
