发明名称 ELECTRONIC CIRCUIT CAPABLE OF CARRYING OUT A SUCCESSION OF DIVISIONS AT A HIGH SPEED WITHOUT AN OBJECTIONABLE ERROR
摘要 <p>The electronic circuit for dividing a dividend (RR) by a divisor (RD) calculates an eventual quotient (Q). An approximate reciprocal (RC) of the divisor is read out of a memory (34) and multiplied in a first multiplication circuit (36) by the divisor to obtain a correction factor (C1). A second multiplication circuit (37) multiplies the dividend by the approximate reciprocal to calculate a first provisional quotient. This is processed by a first adder circuit (61) and a first partial divider (64). The first partial provisional quotient (P1) is modified into the first partial quotient (Q1) with reference to the second provisional quotient in a first correction circuit (661). Likewise, an i-th partial quotient (Qi) is successively produced from an i-th correction circuit (66i) by modifying an i-th partial provisional quotient (Pi) with reference to an (i + 1)-th provisional quotient. The first through the N-th partial quotients (Q1, Q2....QN) are synchronously produced as the eventual quotient (Q) from a synchronization circuit (105). The electronic circuit is capable for carrying out a division at a high speed.</p>
申请公布号 EP0154182(A3) 申请公布日期 1986.06.11
申请号 EP19850101228 申请日期 1985.02.06
申请人 NEC CORPORATION 发明人 KANAZAWA, TAKASHI
分类号 G06F7/496;G06F7/508;G06F7/52;G06F7/527;G06F7/535;(IPC1-7):G06F7/49 主分类号 G06F7/496
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