发明名称 MEMORY EXPANSION SYSTEM
摘要 PURPOSE:To expand a memory such as a program memory only by the slight addition of hardware and the simple change of a program by adding the prescribed number of bits to the number of bits stored in an address holding register. CONSTITUTION:When the decoded result of an instruction decoder 7 is a branch instruction, a branch address defined by 14 bits other than an instruction part of an instruction register 6 and 2 bits formed by a branch control circuit 5 are set in an instruction counter 2 through a selector 4. Consequently, branch to an optional address out of 64K words in a program memory 1 is executed. When the decoded result of the instruction decoder 7 is the one other than the branch instruction, an address obtained by adding '+1' to the contents of an instruction counter 2 by an '+1' adder 3 is set up.
申请公布号 JPS61122765(A) 申请公布日期 1986.06.10
申请号 JP19840244874 申请日期 1984.11.20
申请人 HITACHI LTD 发明人 TAKANO MASAHIRO
分类号 G06F12/02;G06F12/06 主分类号 G06F12/02
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