发明名称 MICROPROCESSOR DEVICE
摘要 <p>PURPOSE:To attain low power consumption by varying the clock frequency of an operation clock supplied to a slave system so as to be an optimum value in accordance with a load in a multiple CPU constitution. CONSTITUTION:Switching of low load and high load is controlled by a master system 3, and at the time of low load, the slave system 4 is actuated by a slave system stop/start signal 9, a variable frequency divider 6 is controlled so as to be necessary clock frequency and then the master system 3 itself is stopped. On the other hand, the slave system 4 starts the master system 3 by a master system stop/start signal 10 in accordance with an internal processing load or an external starting condition to request the change of the clock frequency. Consequently, the clock frequency of an operation clock supplied to the slave system 4 can be varied so as to be the optimum frequency in accordance with the load and low power consumption can be attained.</p>
申请公布号 JPS61122733(A) 申请公布日期 1986.06.10
申请号 JP19840246801 申请日期 1984.11.19
申请人 MITSUBISHI ELECTRIC CORP 发明人 YUKITAKA SUSUMU
分类号 G06F1/04 主分类号 G06F1/04
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