发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To minimize the increase of load capacity against the sense amplifier inside the selection block and to speed up the read time, by dividing the bit line into plural blocks, and restricting the bit line connection after sensing action to th minimum necessary number. CONSTITUTION:Sense amplifier SA0, SA1,- are provided to each blick BK0, BK1, - which include bit line pair BLi0-BLi0, BLi1-BLi1, - and memory cells C00-C0a, C10-C1n, - and activated by block selection signal BS0, BS1, - when the word line of the BK1, switch Si1, - is closed, and bit line BLi1-BLi1 is connected to the data bus DB, -DB. The switches closed are those place data bus side than the selection block, and the increase of load capacity of the sensor amplifier is lowered to necessary minimum comparing with a case when all the switches are on.</p>
申请公布号 JPS61123094(A) 申请公布日期 1986.06.10
申请号 JP19840245803 申请日期 1984.11.20
申请人 FUJITSU LTD 发明人 AOYAMA KEIZO
分类号 G11C11/41;G11C11/34;G11C11/401 主分类号 G11C11/41
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