发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To obtain the most suitable bit line pull up voltage from a main source voltage by providing the function to lower the specified voltage to the bit line pull up circuit. CONSTITUTION:A pull up circuit is formed by connecting the gate of each transister to its own drain, and serially connecting n-number of Schottky barrier type field effect transistors (FET) of enhancement mode, and the bit line of a memory cell 2 composed of the FET is connected to an electric power source through the pull up circuit 1. The voltage lower by (n)XVth by the n-number of transisters at the pull up circuit 1 is supplied to bit line as pull up voltage. Since the bit line pull up voltage can be disposed independently from the source voltage which is supplied to peripheral circuits and memory cell, the memory circuit with no malfunction is thus obtained.</p>
申请公布号 JPS61123090(A) 申请公布日期 1986.06.10
申请号 JP19840245782 申请日期 1984.11.20
申请人 FUJITSU LTD 发明人 TSUCHIYA TAKUMA
分类号 G11C11/409;G11C11/34;G11C11/41;G11C11/417 主分类号 G11C11/409
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