发明名称 Dedithering circuitry in digital TV receiver
摘要 A 7 bit digital signal is dithered by adding a low-level digital dithering signal comprised of alternating 1's and 0's, and by truncating the product to 6 bits. To dedither, an EXCLUSIVE-OR gate compares the previous and the current values of the least significant bit of the 6 bit dithered signal. If they are dissimilar, it outputs a "1". Otherwise, it outputs a "0". The output of the EXCLUSIVE-OR gate is ANDed with the dithering signal. If the dithering signal and the output of the EXCLUSIVE-OR gate are both one, then the 6 bit dithered signal is decremented. Otherwise, the 6 bit dithered signal is passed unchanged. The decremented-or-not 6 bit dithered signal is combined with the bit generated by the EXCLUSIVE-OR gate to produce the final 7 bit reconstituted signal.
申请公布号 US4594726(A) 申请公布日期 1986.06.10
申请号 US19840676142 申请日期 1984.11.29
申请人 RCA CORPORATION 发明人 WILLIS, DONALD H.
分类号 H03M1/08;H03M1/20;H03M7/30;H04B14/04;H04N7/26;H04N9/64;H04N11/04;(IPC1-7):H03M1/20 主分类号 H03M1/08
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