MEMORY BACK-UP CONTROLLER

摘要

PURPOSE:To attain the effective memory back-up control by shifting the operation to a low power consumption made with a time delay of a prescribed time constant when the level reduction of the power supply voltage of a computer is detected in a service interruption mode and then resetting a normal operation mode by a resetting action when the service interruption is recovered. CONSTITUTION:When the DC stabilized power supply voltage VCC is reduced down to the prescribed voltage VCC1 or less in a service interruption mode, a transistor TR2 is cut off. Then a TR3 is also cut of and the DC voltage VDD is switched to the voltage of a battery 6 from the voltage VCC. While a TR5 is cut off and an INT terminal is inverted to 'H' from 'L'. Thus a computer 1 starts the processing immediately to shift the operation to a low power consumption mode. While a TR8 of a reset terminal RST keeps its conduction state by the electric charge of a capacitor 9 even after a TR4 is cut off. The TR8 is cut off after a prescribed period of time and converted to 'H' from 'L' with a time delay of a time constant set by resistances R3-R5 and the capacitor 9. When the service interruption is recovered, both terminal INT and RST are at 'L' almost concurrently with each other. Thus the computer 1 starts its operation again.