发明名称 MULTIPLIER
摘要 PURPOSE:To simplify the addition/subtraction of constants at a high speed by supplying the output of an accumulator register as an input of a pre-load control circuit and also supplying the input given from an external terminal as the other input of said pre-load control circuit. CONSTITUTION:A tristate buffer 7 is set in a high impedance state in case the selection of fields is carried out by a field selection signal FC. Thus an accumulator register 6 is separated electrically from an external terminal 8 to eliminate the mutual effects between the register 6 and the terminal 8. When no selection of fields is not carried out, the register 6 is connected to the terminal 8. Then the storage value of the register 6 is delivered through the terminal 8. Furthermore an accumulation control circuit 10 controls the data delivered from the register 6 based on the accumulation signal ACC, addition/subtraction signal ADD/SUB, pre-load control signal PC and field selection signal FS respectively and then sends the data to a totalization circuit 4. Thus the addition/ subtraction is possible between the data of the register 6 and the data supplied through the terminal 8.
申请公布号 JPS61121130(A) 申请公布日期 1986.06.09
申请号 JP19840244034 申请日期 1984.11.19
申请人 TOSHIBA CORP;TOSHIBA MICRO COMPUT ENG CORP 发明人 HAMAI TSUNEO
分类号 G06F7/53;G06F7/523;G06F7/544 主分类号 G06F7/53
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