发明名称 TIMER OF MULTI-PROCESSOR SYSTEM
摘要 <p>PURPOSE:To decrease the number of component parts with a slave processor by setting the prescribed initial value to a shared memory when a timer is started to decide this initial value repetitively and detecting the end of time lapse at a time point when said initial value is set at zero. CONSTITUTION:A master processor 2 receives the periodical interruptions from an oscillator 1 and checks the contents of a specific memory of a salve processor to do nothing as long as the memory contents are equal to zero. While the processor 2 subtracts 1 from said memory contents if these contents are equal to the value except for zero and stores the subtracted contents. While the processor 5 sets the initial value (n) to a prescribed address (m) of the memory 4 when a timer is started. Then the processor 5 decides repetitively the contents of the memory 4 until the value (n) is set at zero. In such a way, the processor 5 detects a time point when the contents of the address (m) are set at zero and can know the time (t) passed which satisfies nT<=T<(n+1)T.</p>
申请公布号 JPS61121155(A) 申请公布日期 1986.06.09
申请号 JP19840243832 申请日期 1984.11.19
申请人 YOKOGAWA ELECTRIC CORP 发明人 ITO KAZUO
分类号 G06F9/48;G06F1/04;G06F1/14;G06F9/46;G06F9/52;G06F15/16;G06F15/177 主分类号 G06F9/48
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