| 摘要 |
PURPOSE:To prevent reduction in throughput by providing an adder subtracting a correction value from an output of a branch metric calculation section of a distributor and distributing the result to each operating circuit in a viterbi decoder decoding an error correction convolution code. CONSTITUTION:A path metric value from operating circuits 2-5 is fed to a minimum metric selection circuit 8, a minimum value is selected and converted into a complement by a complement circuit 9, fed to adders 12-15 of a distribu tor 1 as a correction value, added to a branch metric value for normalization. The normalization of the path metric value is executed by the distributor 1 in the operation circuits 2-5. That is, the path metric value + (branch metric value - correction value) of the pre-stage is processed in the operation circuits 2-5, and since the calculation in the branckets above is processed by the distrib utor 1, the processing reducing the correction value is not included in the opera tion circuits 2-5, and then the reduction in the throughput due to normalizing processing is prevented.
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