发明名称 |
SIGNAL BUFFING SYSTEM |
摘要 |
PURPOSE:To avoid the loss of signals in case of fault by using a memory which can be referred to from both a signal ink control processor and a signal network control processor and storing the buffers for transmission/reception signals and retransmission signals in said memory. CONSTITUTION:Signal link control processors SLC1-SLCn and a signal network control processor SNC can refer to double port memories M1-Mn. Then the buffers for transmission/reception signals and retransmission signals are stored in those double port memories. Thus the signals sent from the processor SNC and stored in a buffer can be collected even in a faulty mode of processors SlC1-SLCn. |
申请公布号 |
JPS61120253(A) |
申请公布日期 |
1986.06.07 |
申请号 |
JP19840240674 |
申请日期 |
1984.11.16 |
申请人 |
HITACHI LTD |
发明人 |
MIZUHARA NOBORU;HOSHI TORU;KAWAKITA KENJI;KOSHIBA TADASHI;YAMAZAKI MOTOAKI |
分类号 |
H04L29/02;G06F13/00;G06F15/167;H04L29/00;H04L29/14 |
主分类号 |
H04L29/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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