| 摘要 |
PURPOSE:To attain a dividing operation at a high speed by repeating the addition/subtraction and the left shift operation by (n) steps and through a direct subtraction method for execution of division and correcting the quotient and the residue in response to the code bits of the divisor and the dividend. CONSTITUTION:A dividend X containing (N+n) bits and a divisor Y of N bits are supplied to a divider 11. The divider 11 delivers the n-bit quotient Q', a 1-bit overflow OF and the N-bit residue R' respectively. The quotient Q' is supplied to a quotient correcting circuit QC for correction of codes. Then the corrected quotient Q is obtained from the circuit QC. While the residue R' is supplied to a residue correction circuit RC for correction of codes. Then the corrected residue R is obtained from the circuit RC. |
