发明名称 PARALLEL/SERIAL CONVERTING CIRCUIT OF PICTURE MEMORY
摘要 PURPOSE:To extend the width of the use of a CPU by taking out picture signals, which are stored in a picture memory, from the picture memory directly through P/S conversion and outputting a P/S conversion start signal only as the control operation of the CPU. CONSTITUTION:Before the P/S conversion start signal is supplied to an initial value setting circuit 3, picture signals supplied from a picture signal input device through a data bus 22 are stored successively in a picture memory 1 in accordance with the byte address signal supplied from the CPU to the memory 1 through an address bus 25. When the P/S conversion start signal is supplied from the CPU to the initial value setting circuit 3, the tristate latch 4. At this time, the first multiplexer 5 switches the output of a start address register 8 to an input terminal A of an adder 15 and the second multiplexer 6 switches the output of a NOR gate 14 to an input terminal B of the adder 15 in case of the first P/S converting operation and switches the output of a register 9 to the input terminal B of the adder 15 in case of the second P/S converting operation by the output of the initial setting value circuit 3.
申请公布号 JPS61117666(A) 申请公布日期 1986.06.05
申请号 JP19840238240 申请日期 1984.11.14
申请人 FUJI XEROX CO LTD 发明人 HIRAYAMA YOSHIFUMI
分类号 H04N1/21;G06T3/60;G06T9/00 主分类号 H04N1/21
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