发明名称 OUTPUT CIRCUIT
摘要 PURPOSE:To prevent in advance the generation of a through-current by turning on the 1st and 2nd transistors (TRs) at the same time to bring the low voltage level to a low level thereby preventing simultaneous turning-on of the 3rd TR to the 1st and 2nd TRs. CONSTITUTION:When a terminal 1 of an I<2>L is opened, an injection current is fed to a TR Q12 via a resistor R1 and a TR Q11 to turn on a TR Q12. In such a case, the output current of a constant current circuit CS1 flows to the TR Q 12 to turn off a TR Q1 constituting an output circuit 2. When the terminal 1 is at a common potential, the Q12 is turned off and the Q1 is turned on. When the Q1 is turned off, the Q2 is also turned off. When the Q1 is not completely turned off, a minute current flows to the Q1 and no bias current is fed to the Q3. The Q1is turned off completely and the base current fed to the Q3 is increased, then the Q3 is turned on. Since the Q2 is turned off completely at this point of time, no through current flows to the Q1-Q3.
申请公布号 JPS61118022(A) 申请公布日期 1986.06.05
申请号 JP19840238394 申请日期 1984.11.14
申请人 HITACHI LTD;HITACHI MICRO COMPUT ENG LTD 发明人 TAKAGISHI HIROAKI;HOSHINO MASAKAZU
分类号 H03K19/018;H03K17/60 主分类号 H03K19/018
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