发明名称 |
Process for fabricating semiconductor integrated circuit devices. |
摘要 |
<p>After contact holes (23, 22) for the P- and N-type source or drain regions (12, 8) of P- and N-channel MOSFETs (6, 5) have been made at a common step, an N-type impurity a ion-implanted into at least the N-type source or drain regions (12) through the contact holes (22). The N-type impurity is annealed to form an N-type region (9) which is deeper than the N-type source or drain regions (12). During the annealing treatment, the N-type source or drain regions (12) are covered with an insulating film.</p> |
申请公布号 |
EP0183204(A2) |
申请公布日期 |
1986.06.04 |
申请号 |
EP19850114857 |
申请日期 |
1985.11.22 |
申请人 |
HITACHI, LTD. |
发明人 |
IKEDA, SHUJI;NAGASAWA, KOUICHI;MOTOYOSHI, MAKOTO;NAGAI, KIYOSHI;MEGURO, SATOSHI |
分类号 |
H01L21/8238;H01L27/092;H01L29/08;(IPC1-7):H01L21/82;H01L21/28;H01L21/90 |
主分类号 |
H01L21/8238 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|