| 摘要 |
PURPOSE:To decrease output jitter providing a voltage controlled oscillating circuit whose frequency is changed by an applied voltage difference between two input terminals and a sampling phase comparator circuit outputting a voltage sampling/holding an output signal of the voltage controlled oscillator with an input signal of a prescribed frequency. CONSTITUTION:A sampling phase comparison circuit 1 sampled an output signal f0 of a voltage controlled oscillator 2 in the period of an input signal f1 and outputs a phase difference voltage A. A control voltage generating circuit 3 outputs a voltage B controlled by a controlled input C. The output frequency of the voltage controlled oscillating circuit 2 is controlled by a voltage difference between the output A of the sampling phase comparison circuit 1 and the output B of the controlled voltage generating circuit 3. The order of number of multiple is controlled easily by controlling the output voltage B of the controlled voltage generating circuit 3 to Vn-1 or Vn+1. |
