| 摘要 |
PURPOSE:To prevent a pulse motor from generating an abnormal peak current or decreasing its torque due to an abnormal peak current by providing a dead time at the rise of each exciting pulse, thereby eliminating the displacement of a torque point. CONSTITUTION:D1, D2, D3, D4 outputs of a control IC (IC2) are respectively input to the bases of output stage transistors Tr1, Tr2, Tr3, Tr4. An external CR circuit 2 is provided in a delay IC (IC3), and positive and reverse clock pulses (CW), (CCW) branched through a NAND circuit 9 are input to the B input of the delay IC (IC3). A dead time forming pulse P1 decided at the time constant by the CR circuit 2 is input from Q output to the address input A0 of the IC (IC2) to delay the drive pulse of the transistor. |
