发明名称 WAVEFORM DELAY CIRCUIT
摘要 <p>PURPOSE:To obtain an output signal immune from the fluctuation of a power supply voltage and always having a constant delay time by providing a voltage clamp circuit clamping the charging voltage of a capacitor. CONSTITUTION:The clamp circuit comprising diodes Q3,Q4,Q5 and Q6 is provided in parallel with a capacitor C and the clamp voltage is a voltage 2Vr being twice the reference voltage Vr of a voltage comparator. Further, diodes Q7,Q8 receiving a current I0 from a constant current source are used to form the reference voltage Vr. The voltage comparator 1 compares the voltage level of the capacitor C with the reference voltage Vr and a signal subject to time delay in response to the slope of charge/discharge of the capacitor C is outputted. Even when the power supply voltage Vcc is increased, since the clamping by the diodes Q3 Q6 acts on the voltage across the capacitor C, the charging voltage is unchanged.</p>
申请公布号 JPS61112416(A) 申请公布日期 1986.05.30
申请号 JP19840233720 申请日期 1984.11.06
申请人 MITSUBISHI ELECTRIC CORP 发明人 TANAKA JUN;OGATA TAKASHI
分类号 H03H11/26;H03K5/13 主分类号 H03H11/26
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