发明名称 SWAPPING CONTROLLER FOR MULTI-HIERARCHY MEMORY SYSTEM
摘要 PURPOSE:To transfer data at a high speed in a swapping-out mode by holding the information on the propriety for swapping-out for each block of the lower storage and swapping out with priority the transfer of data from the upper storage. CONSTITUTION:The accesses are given to a valid bit 11 corresponding to a block entry 13 as well as to a C bit array 12 in response to the column address of a memory address 301. Then the information A0 and A1 on the propriety for swapping-out of blocks are produced on the outputs of AND circuits 302 and 303. These information are applied to a processing type deciding circuit consisting of AND circuits 304-309, an exclusive OR 310 and an OR circuit 311. Then the types I-IV of working orders of memory accesses are obtained on flip-flops 312-314. Thus a memory access order control part 316 starts both BS and MS access control circuits 316 and 317 by the prescribed times according to said types.
申请公布号 JPS61112260(A) 申请公布日期 1986.05.30
申请号 JP19840233328 申请日期 1984.11.07
申请人 HITACHI LTD 发明人 TANIGUCHI TOSHIHISA
分类号 G06F12/08 主分类号 G06F12/08
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