发明名称 DIAGNOSING SYSTEM FOR LOGICAL CIRCUIT
摘要 PURPOSE:To facilitate the diagnosis with a light detection rate, by performing the diagnosis with the scanning in and out of a switch insertion circuit section after a logical circuit is traced in the fan-in direction to determine the insertion position of a switch from the number of gates. CONSTITUTION:The partial circuit of a large logical circuit is divided into subdivision circuits 1-4. The subdivision circuit 1 is allowed to set data through a switch circuit from alpha, beta and gamma to make the data observable through the switch circuit from FF(a). Likewise, subdivision circuits 2-4 can be diagnosed individually as small circuit using FF (l), (m), (n) and (o) as scan input points and alpha, beta and gamma as scan output points. Upto the present, giant circuits is hard to diagnose because it cannot be handled by the ordinary divided circuit or unavoidably requires huge processing time. But according to this invention, it can be divided into split circuits easy to handle and scanning in or out can be done freely from division points such as alpha, beta and gamma thereby assuring a high diagnosis detection rate and processing speed.
申请公布号 JPS61110069(A) 申请公布日期 1986.05.28
申请号 JP19840230126 申请日期 1984.11.02
申请人 HITACHI LTD 发明人 HIYAMA TORU;ISHIYAMA TAKASHI;MORIWAKI IKU
分类号 G01R31/28;G06F11/22;G06F11/267 主分类号 G01R31/28
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