Integrated circuit chip with bit-stacked functional blocks.

摘要

The integrated chip (10) includes at least one multi-bit data flow path for transferring data from a source functional block to one or more destination blocks, each functional block performing different basic functions such as a register storage function (L15, L16), a switching multiplexor function (L22 or L25) or a compare function and are arranged such that each comprises the same number of stages (n). The register (L15) and multiplexor (L22) blocks are arranged such that each stage within the block is identical, having been formed by a group of basic semiconductor devices which have been interconnected to form a one bit function. The stages are placed physically adjacent and extend in one direction of the chip. The physical width (W) of all such functional blocks is made identical as is the physical width (w) of each stage within a functional block. The functional blocks are placed into "vertical bit stacks" (LS,CS, RS) in which corresponding stages of different blocks are in vertical alignment. Interconnections between blocks are made through a predetermined number of location pre-allocated global buses, (40, 50) said predetermined number reflecting both the number of functional blocks within a stack as well as their average interconnectivity.