| 摘要 |
<p>A circuit for deriving a synchronizing signal contained in an incoming video signal, comprising a pulse generator (6) generating the synchronizing signal when the incoming signal reaches a threshold value. This threshold value corresponds to a level located between the peak and reference levels of the incoming signal and is determined with the aid of a keyed integrator (5), which integrates the video signal during a period of time which at least partly coincides with the occurrence of an incoming line synchronizing pulse (H) and during a period of time after this occurrence, but before the end of the line blanking interval (B). In the synchronized state of the line synchronizing circuit (8), the required keying pulses are generated by this line synchronizing circuit; in the non-synchronized state the keying pulses are derived from the delayed (by 15) output signal of the pulse generator (6).</p> |
