发明名称 PHASE LOCKED OSCILLATOR
摘要 PURPOSE:To make an output frequency of a voltage controlled oscillator to a constant value by using a voltage obtained by integrating an output of an occupied rate converting circuit to control the voltage comparison circuit when the said output is a prescribed rate or over and using the output signal to control the occupied rate converting circuit. CONSTITUTION:When a normal reference input signal is fed from an input terminal 100, a selection circuit 2 selects a signal of a phase comparator circuit 1 by using a selection signal generated from an input fault detection circuit 7. If an error takes place in the reference input signal fed to the terminal 100, the circuit 7 detects it to invert the selection signal. As result, the circuit 2 selects an output signal of the occupied rate converting circuit 6 to give an output to an integration circuit 3. When the occupied rate of the output signal of the circuit 6 is >=50%, the output voltage of the circuit 3 obtained by integrating the said signal rises, the output controls the voltage comparison circuit 5, whose output controls the output signal of the circuit 6 to a value less than 50% of the occupied rate. As a result, the output frequency of the voltage controlled oscillator 4 driven by the output of the circuit 3 is brought into a prescribed value.
申请公布号 JPS61109323(A) 申请公布日期 1986.05.27
申请号 JP19840231864 申请日期 1984.11.02
申请人 NEC CORP 发明人 MUTO HIROSHI
分类号 H03L7/14;H03L7/06;H03L7/08 主分类号 H03L7/14
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