| 摘要 |
PURPOSE:To improve the chip utilizing efficiency by providing in parallel a required number of basic array units comprising an AND array and an OR array on a chip while using a product term line in common. CONSTITUTION:An input line 13a or a couple of complementary input lines 13a, 13b in an AND array 11 is to be cut off as shown in a circle Ci at an optional point on its/their half way. Further, an optional point on the way of an output line 14 of an OR array 12 the same as the line of the AND array 11 is to be cut off as shown in a circle C0. Then a PLA is formed by providing in parallel required number of basic array units 10 each comprising an AND array and an OR array on the chip while using the product term line in common. Thus, the chip utilizing efficiency is improved. |
