发明名称 BIPOLAR RAM
摘要 PURPOSE:To obtain a bipolar RAM having the high degree of integration and high reliability by substantially cutting off a write/read current to memory cells disposed in a memory array in a chip non-selection mode. CONSTITUTION:An internal chip selection signal -CS is used to inhibit the constant read/write current which flows to the memory cells MS of the memory array M-ARY in a chip non-selection mode. Transistors TRQ18-Q20 function to flow selectively the current of a constant current source consisting of TRQ15-Q17 according to the level of the signal -CS. In the chip non-selection mode the signal -CS is set at a level higher than the selection signal produced by a Y address decorder YDCR. Thus an ON state is secured to bypass said constant write/read current.
申请公布号 JPS61104489(A) 申请公布日期 1986.05.22
申请号 JP19840222193 申请日期 1984.10.24
申请人 HITACHI MICRO COMPUT ENG LTD;HITACHI LTD 发明人 MIWA HIDEO;HARUFUJI SEIICHI;MIZUE KATSUYA
分类号 G11C11/41;G11C11/34 主分类号 G11C11/41
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