| 摘要 |
PURPOSE:To enable the increase in capacitance of the capacitor gate by reducing the transfer gate-capacitor gate spaces by a method wherein the side wall is formed on a transfer gate, and an HiC junction is formed by self-alignment, using the mask of this side wall. CONSTITUTION:After a field oxide film 1 is formed on a substrate 10, a transfer gate insulation film (SiO film) 6 is formed. Further, a transfer gate 7 is formed out of polycrystalline Si; then, a side wall 12 made of PSG or the like is formed. The side wall length 15 is set so as to satisfy the relation L3<=L4+L5 (L3 is the boron diffusion length, L4 is the N<+> diffusion length from the end of a transfer gate electrode). Using the mask of this side wall 12 and the field oxide film 1, a P<+> diffused layer 4 and an N<+> diffused layer 3 are formed by ion implantation. Next, the side wall 12 is removed, and a capacitor gate insulation film (SiO film) 2 is formed. Then, a capacitor gate electrode 5 is formed out of polycrystalline Si, and source-drain regions 8 are formed by ion implantation. |
