发明名称 MEMORY SYSTEM FOR STATE HISTORY
摘要 PURPOSE:To attain the tracing of a microprogram address with no increase of the memory capacity by providing plural registers to compare the contents of these registers with each other and writing those contents on a tracer memory only when discordance is obtained from said comparison. CONSTITUTION:When an information processor starts its actuation, the address of the first microprogram is stored in the 1st register 2. Then the output of the register 2 is compared with the value of a register 4 by a comparator 5. When no coincidence of comparison is obtained, the contents of both registers 2 and 4 and written on a tracer memory means 6. Then the contents of the register 2 are increased by an adder 3 and stored to the register 4. While the register 2 stores the address of the next microprogram. Then the contents of both registers 2 and 4 are compared with each other by the comparator 5 and then stored in the means 6 if no coincidence is obtained between them. Thus it is possible to trace a microprogram without increasing the memory capacity.
申请公布号 JPS61103256(A) 申请公布日期 1986.05.21
申请号 JP19840224188 申请日期 1984.10.26
申请人 NEC CORP 发明人 SHIBATA YOSHIHISA
分类号 G06F11/28;G06F11/34;G06F11/36;(IPC1-7):G06F11/34 主分类号 G06F11/28
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