| 摘要 |
PURPOSE:To form easily and acurately a sampling gate for multiple-signal without uisng an integration circuit by providing a comparator to compre count er output and a preset value, and a mean which generates a gate to be made operatable at outputting from a comparator to sample a signal that is super posed during a vertical flyback period. CONSTITUTION:To the reset input of a counter 11, horizontal synchronizing pulses are inputted through a horizontal synchronizing pulse input terminal 2, and the counter 11 is reset at every 1H. To one input of a comparator 12, the output of the counter 11 is supplied, while to the other input, the output of a set value circuit 13 is added. The output of this comparator 12 is supplied to a gate generator drive 14. To one input of a gate generator circuit 6, the output of the gate generator drive circuit 14 is connected, and to the other input is connected with the horizontal synchronizing pulses. From the output of this gate generator 6, via sampling gate output terminal 7, the sampling gate is obtained.
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