| 摘要 |
PURPOSE:To attain the inexpensive position control with high accuracy and with no error output by inhibiting the impression of the pulse signal produced from a pulse generating means to a deviation counter when a counter means of a parallel/serial data conversion circuit is counted up. CONSTITUTION:When the parallel data are impressed to a rate multiplier 14 and a counter circuit 16 from a CPU, a preset signal is impressed to a terminal 19. The circuit 16 sets the value N and starts down-count action at and after a time point when the preset signal is impressed to the circuit 16 when said parallel data is equal to the value N. At the same time, an output signal which is inverted to H from L is produced at an output terminal and impressed to an AND gate 18. While the multiplier 14 produces a pulse signal having the number of pulses accordant with the data value N and delivers it via the circuit 18. In this case, the circuit 16 receiving the reverse output via an inverter circuit 17 is counted up. Thus the circuit 16 is set at L. This inhibit a case where the pulse signal is delivered to a deviation counter from the multiplier 14 via a terminal 20. |
