发明名称 ARITHMETIC UNIT OF SEQUENCE CONTROLLER
摘要 PURPOSE:To simplify an arithmetic part and to eliminate the waste time produced between a CPU and the arithmetic part when the processing of a control instruction is transferred between them, by using a program counter of a CPU and setting the arithmetic part under the direct control of the CPU. CONSTITUTION:A microprocessor 2a for parallel plural bits can execute a string primitive instruction. Thus the address signals are sent continuously to a sequence program memory 1e and the sequence instructions can be read out successively without reading an instruction code out of a program after the head address and the data reading frequency are designated. While these address signals are transferred without reading the instruction out of the program. Thus an instruction executing cycle during which the address signal is sent out and the arithmetic result is stored in a data memory 1f is completed in about a micro-second. Furthermore, a range between optional addresses can be sent continuously via a bus 1n by the count output of a program counter 1b.
申请公布号 JPS61103246(A) 申请公布日期 1986.05.21
申请号 JP19840225596 申请日期 1984.10.26
申请人 MITSUBISHI ELECTRIC CORP 发明人 FURUSAWA YOSHIYUKI
分类号 G06F9/32;G05B19/02;G05B19/05 主分类号 G06F9/32
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