| 摘要 |
PURPOSE:To generate automatically a synchronizing signal required at a reception side to decode a data from the transmission side by transmitting a bit rate setting signal having a frequency corresponding to the bit rate of a data transmitted before the start of transmission of data from the transmission side. CONSTITUTION:The transmission side 1 transmits the bit rate set signal having a frequency corresponding to the bit rate of the transmitted data ahead the transmission of data at a reception side 2. The bit rate set signal is fed to a processing section 3 and a detection circuit 4, and the detection circuit 4 outputs a pulse signal at the leading and trailing. The phase locked loop (PLL) inputting the output signal of the detection circuit 4 is constituted by a phase comparator 5, a low pass filter 6, a voltage controlled oscillator 7 and a programmable divider 8. The frequency division ratio of the programmable divider is controlled by a control means so that the output signal of the voltage controlled oscillator has a frequency corresponding to the bit rate. Thus, the PLL is locked by using the bit rate set signal and the output signal of the programmable divider is used as the synchronizing signal of the reception side. |
