发明名称 EMERGENCY STOP SIGNAL INPUT CIRCUIT
摘要 PURPOSE:To prevent surely malfunction due to noise by connecting plural delay elements in series and outputting an emergency stop signal to a CPU only when the delay elements are all at a prescribed level. CONSTITUTION:If a noise comes to an input line of a stop switch 2, an output signal f5 of an FF5 goes to a high level at the leading of a pulse next to a clock signal (d). When the noise is lost, the output signal f5 of the FF5 goes to a low level at the leading of a pulse next to the signal (d). Similarly, the output signals of FFs 6,7 change in following to the input signal with a delay of one period to the signal (d). The period of the signal (d) is sufficiently longer than that of the noise. The period when the output signal f7 of the FF 7 is at a high level after the leading of the noise N3 is a period exceeding the two periods of the signal (d) by the FFs 5-7, the noise is lost already and the signal f5 of the FF 5 is restored to a low level. Thus, not all of the three inputs to an NAND circuit 10 are at a high level at the same time and the input to the CPU remains at a high level.
申请公布号 JPS61101802(A) 申请公布日期 1986.05.20
申请号 JP19840223023 申请日期 1984.10.25
申请人 HITACHI CONSTR MACH CO LTD 发明人 KIMURA TOSHIHIRO
分类号 G05B9/02 主分类号 G05B9/02
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