| 摘要 |
<p>PURPOSE:To shorten the operation time and increase the rate of in-taking of the input data column by taking-in the input data column in two data memories of real number part and imaginary number part alternately when the input column is of real number data only. CONSTITUTION:The operation of the real number part is performed by a data memory 22, a multiplier circuit 24, and an adder-subtractor 25, and that of the imaginary number part is done by a data memory 23, a multiplier circuit 26, and an adder-subtractor 27. A fast fourier transform arithmetic circuit needs at least four clocks in order to perform the butterfly operation of the input data constituted only by the real number part. Therefore, when the input data column is of real number part only, the data is so controlled as to be taken-in by memories 22 and 23 alternately. In this manner even if the frequency of the internal clock is 1/2 of that of the clock that controls the entire system, all the data columns can be stored in the memories 22 and 23 without lowering transmission time to 1/2. Also, two pieces of data can be transmitted to the arithmetic circuit by one clock.</p> |
