| 摘要 |
A method for fabricating junction field-effect transistors includes forming in an N-type silicon substrate a plurality of high-aspect-ratio bores interposed between a source region and a drain region in the substrate, diffusing P-type impurities a predetermined distance into the substrate from the inner surface to each bore to form a concentric, P-type gate zone around each bore, forming electrical contacts to the source and drain regions and to the gate zones and forming a P-type isolation zone surrounding the source and drain regions and the gate zones. The bores, which are preferably formed by laser drilling, extend completely or partially through the thickness of the substrate. The gate zones extend, either completely through the thickness of the substrate or from the top surface of the substrate to a layer-like P-type zone formed adjacent to the bottom surface thereof. The method provides a junction field-effect transistor structure in which the conducting channel extends through nearly the entire thickness of the substrate and, therefore, results generally in a more compact device.
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