发明名称 DIGITAL PHASE SYNCHRONIZING CIRCUIT
摘要 PURPOSE:To obtain a phase synchronizing circuit suitable for circuit integration by constituting generation of a clock synchronously with an identified digital signal only with a digital circuit. CONSTITUTION:A comparator 1 compares a transmitted waveform with a refer ence voltage source 2 and applies a digital value formed to a shift register 3. The register 3 is activated by using a local clock having a frequency higher than that of a transmission clock from a local clock generator 9, the identified digital signal is subject to multi-point sampling and each stage output of the value is inputted to a center position detection circuit 5. The circuit 5 detects a phase synchronizing signal 5-1 from an output signal of each stage from the register 3 by the circuit 5 and fed to a phase circuit 20. When the circuit 20 applies the signal 5-1 to a counter circuit 19, the circuit 19 counts a pre scribed number of local clocks from a generator 9 and gives its output to a latch circuit 4. The circuit 4 latches a Q10 output of the register 3 when the sampling value of the medium of the digital signal subject to multi-point sam pling is outputted from the register 3 and reproduces correctly a reception signal.
申请公布号 JPS61100038(A) 申请公布日期 1986.05.19
申请号 JP19840222419 申请日期 1984.10.23
申请人 NEC CORP 发明人 SHIMIZU HIROSHI
分类号 H03L7/06;H04L7/033 主分类号 H03L7/06
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