发明名称 SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To prevent occurrence of a situation that an interruption signal of a controlled device low in the priority order is not accepted indefinitely by constituting to make a host controlling device accept interruption signals generated by plural controlled devices equally. CONSTITUTION:Controlled device 2M, 2N- have an ROM23, JK flip-flop 24, 25, the first signal processing circuit 26 and the second signal processing circuit 27. Controlled devices 2M, 2N- do not send out own identification signals while the record of sending out of identification signals by controlled devices 2M, 2N- is stored in the JK flip-flop 25 even when a confirmation signal of a host controlling device during generation of an 9 interuption signal, and transfers the received confirmation signal to other controlled device.
申请公布号 JPS61100854(A) 申请公布日期 1986.05.19
申请号 JP19840221528 申请日期 1984.10.22
申请人 FUJITSU LTD 发明人 YOKOYAMA KAZUO
分类号 G06F9/48;G06F13/24 主分类号 G06F9/48
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