发明名称 MANUFACTURE OF SEMICONDUCTOR IC
摘要 PURPOSE:To enable the yield of stable resistance values of small variability by a method wherein the titled manufacture consists of the process of forming the buried layer, the process of epitaxially growing the Si layer, the process of forming the impurity diffused layer, the process of selective etching, and the process of converting the part of a remaining Si layer into an oxide layer. CONSTITUTION:An Si oxide film is formed on a P type single crystal Si substrate 7 and selectively doped with antimony or arsenic, thus forming an N type buried layer 8. A P type or N type Si layer 9 is epitaxially grown over the whole surface, and this Si layer 9 is selectively doped through an aperture 11 with phosphorus or arsenic in the case of N type, and boron in the case of P type, resulting in the formation of a resistance region 12. After the whole removal of the Si oxide film 10 located on the surface, an Si oxide film 13 and an Si nitride film 14 are successively formed over the surface; then, these films are selectively etched. On oxidation after boron ion implantation, that part of the layer 9 which is not covered with the Si nitride film 14 is selectively etched; accordingly, the resistance region 12 is formed in the island region.
申请公布号 JPS6197857(A) 申请公布日期 1986.05.16
申请号 JP19840220029 申请日期 1984.10.18
申请人 MATSUSHITA ELECTRONICS CORP 发明人 SHIRAISHI MASATOSHI
分类号 H01L21/76;H01L21/822;H01L27/04 主分类号 H01L21/76
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