| 摘要 |
PURPOSE:To eliminate a delay from the start of change of a main body output to the start of change of an inverter output and to read a RAM at a high speed by shorting an input and an output of the inverter connected to the sense amplifier main body during the reading period through the transistor for shorting. CONSTITUTION:An FETQ10 for shorting is turned on during the reading period of a RAM, the input output of the second step inverter 2 connected to the first step current mirror type sense amplifier main body 1 of the sense amplifier is shorted, and the voltage of a node SA1 of the main body 1, which is at the middle electric potential by precharging or discharging, is directly outputted. Consequently, a delay time from the start of change of the output of the main body 1 to the start of change of the output of the inverter 2 is eliminated and the RAM can be read at a high speed. A through electric current low area of the inverter 2 can be improved by an FETQ9 for pulling up. |
