| 摘要 |
PURPOSE:To improve the performance of an entire system by providing plural competition control sections and permitting bus possession to a processor high in priority before initiation of an access even after the bus possession is permitted to a processor low in the priority. CONSTITUTION:Processors 1, 2 output a bus gaining requests REQA, REQB to a first competition control section 5a when a bus gaining is required. In such a case, the processor 2 is higher in priority in the bus gaining. Before an access initiation ACKA with respect to the processor 1 is outputted, when the bus gaining request REQB from the processor 2 is generated, a competition judging output RB is generated from the control section 5a, and a temporary recognition signal GATA is turned OFF and a GATB is turned on. Thereby, an access of the temporarily recognized processor 1 is held and on the contrary, the access of the processor 2 is permitted, a processing efficiency of the processor 2 is improved and a performance of an entire system can be improved. |
