发明名称 PLANAR SEMICONDUCTOR DEVICE
摘要 <p>PURPOSE:To surely prevent discharge by a method wherein a part of overlay overhanging out of the impurity region of an electrode is made of polycrystalline Si layer, and the surface of the polycrystalline Si layer is covered with an oxide film formed by oxidizing treatment of this Si layer. CONSTITUTION:A polycrystalline Si layer 11' widely overlaid with a width W1 on the junction of a P<+> type impurity region 2 and a polycrystalline Si layer 12' widely overlaid with a width WG in the periphery of an N<+> type annular ring region 5 are formed on a field oxide film 6. These polycrystalline Si layers 11' and 12' are connected to corresponding aluminum electrodes 11 and 12, respectively. Excluding connections with the aluminum electrodes, the surfaces of the polycrystalline Si layers 11' and 12' are coated with Si oxide films 11'' and 12'' formed by oxidizing these polycrystallines Si layers. Therefore, even when the distance Wo between overlay electrodes is shortened, the discharge between the both can be prevented.</p>
申请公布号 JPS6120368(A) 申请公布日期 1986.01.29
申请号 JP19840141585 申请日期 1984.07.09
申请人 TOSHIBA KK 发明人 KAMAZAKI KEIJI
分类号 H01L29/74;H01L23/485;H01L23/532;H01L29/06;H01L29/40;H01L29/45 主分类号 H01L29/74
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