发明名称 FAULT DETECTION SYSTEM
摘要 PURPOSE:To detect the loop state of a line by allowing a data transmitter at the transmission side to insert a unique address with an opposite data at least in a transmission frame and checking it at the reception side. CONSTITUTION:Each data transmitter 1 has a specific address and this address is given to all transmission/reception frames. A transmission section of a transmission station reads an address of the own station from a built-in memory and inserts it to a field A of the transmission frame. A reception section of a reception station compares an address of the field A of the reception frame with the address read from the built-in memory and when they are not coincident, the reception frame is regarded to be correct. When the reception station detects a frame error as the result of the check of the field A, a line between data transmitters transmits a message a loop state to a station being a management center to block the line between the data transmitters.
申请公布号 JPS6195644(A) 申请公布日期 1986.05.14
申请号 JP19840216128 申请日期 1984.10.17
申请人 HITACHI LTD 发明人 SATO KUNIHIKO;NISHIMURA KAZUO
分类号 H04L29/14;H04L13/00;(IPC1-7):H04L13/00 主分类号 H04L29/14
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