发明名称 |
MULTILAYER WIRING STRUCTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT AND MANUFACTURE THEREOF |
摘要 |
PURPOSE:To obtain a multilayer wiring structure which assures microminiaturization, excellent moisture resistance and flatness characteristic by forming an interlayer insulating film of a double-layer structure of soluble polyimide resin film and silicon oxide film obtained by baking silicon oxide organic compound and forming a through hole in the two steps of the dry etching of silicon oxide film and dry etching of double polyimide resin. CONSTITUTION:A semiconductor substrate 1 providing a first wiring conductor layer 2 is coated with soluble polyimide resin soluction by the spin coating method and solvent is removed by heat processing under the nitrogen ambient. The soluble polyimide resin film 7 is the coated with silicon oxide organic compound and solvent is removed by heat processing. Thereafter, silicon oxide film 8 is formed through baking under the mixed gas of N2 and O2. This film is then coated with a resist film 4 and a pattern is formed. Thereafter the silicon oxide film 8 is dry-etched with the silicon oxide film 8 used as the mask. With the silicon oxide film 8 used as the mask, the soluble polyimide resin film 7 is etched by O2 plasma and simultaneously the resist 4 is removed. Next, Al is vacuum deposited and a resist mask is then formed thereon and a second wiring conductor layer 6 is formed by the etching. |
申请公布号 |
JPS6195553(A) |
申请公布日期 |
1986.05.14 |
申请号 |
JP19840216736 |
申请日期 |
1984.10.16 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
IWAMOTO NORIKO;TAKEYAMA KENICHI |
分类号 |
H01L21/768;H01L23/522;(IPC1-7):H01L21/88 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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