发明名称 |
Solid slice memory |
摘要 |
An electronic system located upon a single semiconductor substrate including a plurality of isolated electronic subsystems located upon the semiconductor substrate. Each electronic subsystem includes a plurality of input/output lines. Several information bus lines are included that are connected to addressable transistors located between the individual bus lines and the input/output lines. An addressing means is connected to the addressable transistors for addressing each of the addressable transistors and for providing a first state signal indicating an ON condition to the first select group of said addressable transistors, electrically connecting the information bus lines to the input/output lines and a second state signal indicating an OFF condition to a second selected group of the addressable transistors, electrically isolating the information bus lines from the input/output lines. The addressable transistors maintain the state signal indicated condition.
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申请公布号 |
US4589099(A) |
申请公布日期 |
1986.05.13 |
申请号 |
US19820450830 |
申请日期 |
1982.12.20 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
LAFFITTE, DAVID S.;HOPKINS, WILLIAM D.;HAYN, II, JOHN W. |
分类号 |
G11C29/00;G06F13/16;G06F15/78;G11C7/00;G11C7/10;G11C8/00;G11C8/12;G11C11/41;G11C29/04;(IPC1-7):G11C7/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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