发明名称 JAMMING SIGNAL GENERATOR
摘要 PURPOSE:To obtain a more effective jamming signal by generating a tuning voltage of a VCO with use of a voltage synthesizer. CONSTITUTION:After demodulation of a data signal from a center, said signal is inputted to a CPU1 and stored as PLL data in an ROM2 in accordance with the table of a jamming channel. The CPU1 fetches data in the ROM2 and supplies PLL data of one channel to a programmable divider 5. With locks of PLLs 4-9 a VCO8 comes to the jamming frequency concerned, while the output of an LPF7 is fixed as a tuning voltage of the channel. Then an A/D converting action by a CPU13 transfers the output voltage of the LPF7 to an RAM14. With the repetition of a similar action the tuning voltage of each jamming channel is set to the RAM14. Next the D/A converting action by the CPU13 obtains the tuning voltage of the VCO8 with respect to one channel in the RAM14.
申请公布号 JPS6194481(A) 申请公布日期 1986.05.13
申请号 JP19840216879 申请日期 1984.10.15
申请人 PIONEER ELECTRONIC CORP 发明人 UEMURA HIROKI
分类号 H04K1/00;G06F21/10;H04N7/167 主分类号 H04K1/00
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